在用Xilinx Kintex-7 FPGA的Aurora IP核时，发现他的例程无法生成bit文件，错误信息如下：
ERROR:Bitgen:342 - This design contains pins which have locations (LOC) that are
not user-assigned or I/O Standards (IOSTANDARD) that are not user-assigned.
This may cause I/O contention or incompatibility with the board power or
connectivity affecting performance, signal integrity or in extreme cases
cause damage to the device or the components to which it is connected. To
prevent this error, it is highly suggested to specify all pin locations and
I/O standards to avoid potential contention or conflicts and allow proper
bitstream creation. To demote this error to a warning and allow bitstream
creation with unspecified I/O location or standards, you may apply the
following bitgen switch: -g UnconstrainedPins:Allow
Xilinx官网对此的回复是见 AR# 41615 。大意是，新版本的ISE对7系列FPGA的管脚约束增强了限制，以防止在用户不了解电路板电压或管脚连接时，由于ISE对于引脚和IOSTANDARD的默认（default）选择而造成设备的损坏。通俗点说就是，Xilinx以前给我们都是设置好一个default的引脚绑定和IOSTANDARD约束的，但是为了我们用的时候对电路板不了解，也不去改默认的约束，可能会因此烧坏电路板，所以要求我们必须手动设置好才行。
另外，7系列FPGA的默认IOSTANDARD是LVCMOS18，以前的系列是LVCMOS25。
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