PCB Design Guidelines for MT8167
本篇资料包括以下内容：
Packaging：
− Package outline of MT8167
− MT8167 footprint recommendation
− MT8167 ball out design
General Guidelines：
− PCB stack-up recommendation
− Placement notes
− MT8167 fan out
Design Guidelines for High-Speed Digital Signals：
− PCDDR3
− PCDDR3x8x4ps
− PCDDR4
− LPDDR3
− PDN design
Others：
− MT6392 (PMU)
− BT/Wi-Fi, 26MHz CLK
− Audio, eMMC, SD card, MIPI, HDMI, LVDS, USB
本篇资料来自一牛网论坛。下面展示部分资料内容。
MT6392 (PMU)：
MT6392包装大纲
MT6392 Ball Map
MT8167 RF Trace: Wi-Fi/BT：
WB_RF_2G(pin AD4) is RF antenna pin for Wi-Fi/BT. Keep 50Ω impedance with good shielding by GND. (Fig.1)
WB_RF_2G route on L2 and shielded by GND (adjacent and up/down layers). (Fig.1)
AVDD33_WBT and AVDD18_WBT capacitor must be placed close to MT8167 (make trace short). (Fig.1~2)
RF ground balls AVSS_CONN must have 3 PTH via to connect BGA ball to L2 and separate with digital GND。
MT8167 26MHz CLK
26MHz crystal component should be placed near MT8167.
Connectivity 26MHz (26M_XO_IN) should be shielded by GND and routed far away from noise signals.
26MHz trace routing on L1 and well shielded by GND, remove layer2 metal below the trace with keep out
region (adjacent down layers keep out) (Fig.1)
26MHz trace routing layer 1 and adjacent down layer3 routing by AVDD22_XO (Fig.2)
26M_XO_IN the trace length< 300 mil (trace loading should be <0.6pF) (Fig.2)
When adding VIA to change layer, keep VIA in every layers well-grounded
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