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[AR9342]uboot修改总结

[AR9342]uboot修改总结

作者: 金珉锡_4bc1 | 来源:发表于2018-11-22 17:47 被阅读0次

    1、修改/home/data/AR9344/SDK/sdk/boot/u-boot/include/configs/ar7240.h文件

     24 #ifdef CONFIG_ROOTFS_FLASH                                                                                                                                              
     25 #define CONFIG_BOOTARGS "board=DR342 console=ttyS0,115200 mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,14528k(rootfs),1472k(kernel),64k(art),16000k@0x50000(firmware),16384k@0x0(all)"    
     26 #else
     27 #define CONFIG_BOOTARGS ""
     28 #endif
    
    

    2、修改/home/data/AR9344/SDK/sdk/boot/u-boot/common/cmd_bootm.c文件

       156 int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
       157 {    
       158     ulong   iflag;
       159     ulong   addr;
       160     ulong   data, len, checksum;
       161     ulong  *len_ptr;
       162     uint    unc_len = CFG_BOOTM_LEN;
       163     int i, verify;
       164     char    *name, *s;
       165     int (*appl)(int, char *[]);
       166     image_header_t *hdr = &header;
       167      
       168     s = getenv ("verify");
       169     verify = (s && (*s == 'n')) ? 0 : 1;
       170      
       171     if (argc < 2) {
       172         addr = load_addr;
       173     } else {
       174         addr = simple_strtoul(argv[1], NULL, 16);
       175     }
       176      
       177     addr = 0x9fe80000;                                                                                                                                               
       178      
       179     SHOW_BOOT_PROGRESS (1);
       180     printf ("## Booting image at %08lx ...\n", addr);
    
    

    3、修改/home/data/AR9344/SDK/sdk/boot/u-boot/include/ar7240_soc.h文件

    438 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MSB                        15
    439 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB                        8
    440 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK                       0x0000ff00
    441 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_GET(x)                     (((x) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK) >> GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB)
    442 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_SET(x)                     (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK)
    443 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_RESET                      0x1 // 1
    444 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_16_MSB                        7
    445 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_16_LSB                        0
    446 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_16_MASK                       0x000000ff
    447 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_16_GET(x)                     (((x) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_16_MASK) >> GPIO_OUT_FUNCTION4_ENABLE_GPIO_16_LSB)
    448 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_16_SET(x)                     (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_16_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_16_MASK)
    449 #define GPIO_OUT_FUNCTION4_ENABLE_GPIO_16_RESET                      0x0 // 0
    450 #define GPIO_OUT_FUNCTION4_ADDRESS                                   0x1804003c                                                                                         
    451  
    452 /*
    453  * IRQ Map.
    454  * There are 4 conceptual ICs in the system. We generally give a block of 16
    455  * irqs to each IC.
    456  * CPU:                     0    - 0xf
    457  *      MISC:               0x10 - 0x1f
    458  *          GPIO:           0x20 - 0x2f
    459  *      PCI :               0x30 - 0x40
    460  *
    461  */
    462 #define AR7240_CPU_IRQ_BASE         0x00
    463 #define AR7240_MISC_IRQ_BASE        0x10
    464 #define AR7240_GPIO_IRQ_BASE        0x20
    465 #define AR7240_PCI_IRQ_BASE         0x30
    
    

    4、修改/home/data/AR9344/SDK/sdk/boot/u-boot/board/ar7240/db12x/db12x.c文件

       61 void wasp_gpio_config(void)
       62 {
       63     /* disable the CLK_OBS on GPIO_4 and set GPIO4 as input */
       64     ar7240_reg_rmw_clear(GPIO_OE_ADDRESS, (1 << 4));
       65     ar7240_reg_rmw_clear(GPIO_OUT_FUNCTION1_ADDRESS, GPIO_OUT_FUNCTION1_ENABLE_GPIO_4_MASK);
       66     ar7240_reg_rmw_set(GPIO_OUT_FUNCTION1_ADDRESS, GPIO_OUT_FUNCTION1_ENABLE_GPIO_4_SET(0x80));
       67     ar7240_reg_rmw_set(GPIO_OE_ADDRESS, (1 << 4));
       68      
       69     ar7240_reg_rmw_clear(GPIO_OE_ADDRESS, (1 << 16));
       70     ar7240_reg_rmw_clear(GPIO_OUT_FUNCTION4_ADDRESS, GPIO_OUT_FUNCTION4_ENABLE_GPIO_16_MASK);
       71     ar7240_reg_rmw_clear(GPIO_OE_ADDRESS, (1 << 17));
       72     ar7240_reg_rmw_clear(GPIO_OUT_FUNCTION4_ADDRESS, GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK);
       73 }
    
    

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