STM32F031xx 信息整理

时钟信号：

*=============================================================================
  *                         System Clock Configuration
  *=============================================================================
  *        System Clock source          | PLL(HSE)
  *-----------------------------------------------------------------------------
  *        SYSCLK                       | 48000000 Hz
  *-----------------------------------------------------------------------------
  *        HCLK                         | 48000000 Hz
  *-----------------------------------------------------------------------------
  *        AHB Prescaler                | 1
  *-----------------------------------------------------------------------------
  *        APB1 Prescaler               | 1
  *-----------------------------------------------------------------------------
  *        APB2 Prescaler               | 1
  *-----------------------------------------------------------------------------
  *        HSE Frequency                | 8000000 Hz
  *-----------------------------------------------------------------------------
  *        PLL MUL                      | 6
  *-----------------------------------------------------------------------------
  *        VDD                          | 3.3 V
  *-----------------------------------------------------------------------------
  *        Flash Latency                | 1 WS
  *-----------------------------------------------------------------------------
  *=============================================================================

ADC 采样分析：
每20us（50KHz）触发一次中断，开启ADC 采样， 采样250个点，

时钟周期 - 50KHz --- ((48MHz/50K)=960-1) systick
#define PWM_ADC_PERIOD (SystemCoreClock/50000)-1
#define PWM_ADC_PRESCALER 0 //预分频
占空比50%
#define PWM_ADC_PULSE ((uint32_t)5(PWM_ADC_PERIOD-1))/10
// 每960(1/48) = 20uS --- 50KHz 触发一次中断，开启ADC
TIM_TimeBaseStructure.TIM_Period = PWM_ADC_PERIOD;
//计数时钟预分频，f＝48M，systick＝1/48 uS
TIM_TimeBaseStructure.TIM_Prescaler = PWM_ADC_PRESCALER;
TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;// //系统时钟不分频_48MHz

参数解析：

timer_init_structure.TIM_ClockDivision = TIM_CKD_DIV1; //系统时钟，不分频，48M
timer_init_structure.TIM_CounterMode = TIM_CounterMode_Up; //向上计数模式
timer_init_structure.TIM_Period = 312; //每312 uS触发一次中断，开启ADC
timer_init_structure.TIM_Prescaler = 48-1; //计数时钟预分频，f＝1M，systick＝1 uS
timer_init_structure.TIM_RepetitionCounter = 0x00; //发生0+1次update事件产生中断

当前方案：
5K 混频 + 50KHz采样率（每次采集10个点） + 总计采集500个点（APD和REF）+ 计算相位差
更新方案一：
5K 混频 + 50KHz采样率（每次采集10个点） + 总计采集600个点（APD和REF）+ 去除前面100个点的数据后 + 计算相位差