常见 ISA
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CISC
Complex Instruction Set Computing. -
RISC
Reduced Instruction Set Computing.
A common misunderstanding of the phrase "reduced instruction set computer" is the mistaken idea that instructions are simply eliminated, resulting in a smaller set of instructions. In fact, over the years, RISC instruction sets have grown in size, and today many of them have a larger set of instructions than many CISC CPUs. - Processors that have a RISC architecture typically require fewer transistors than those with a CISC architecture (such as the x86 processors found in most personal computers), which improves cost, power consumption, and heat dissipation.
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The only typical differentiating characteristic is that most RISC designs use uniform instruction length for almost all instructions, and employ strictly separate load/store-instructions.
ISA - Comparison of instruction set architectures;
简单梳理
- SPARC
Sun 公司,早期做EMAIL服务时,在 SPARC 机器上运行 Sun Solaris 操作系统。 -
MIPS;
Microprocessor without Interlocked Pipeline Stages. - MIPS processors are used in embedded systems such as residential gateways and routers.
- MIPS 是模块化结构(modular architecture),支持4个 Coprocessor (协处理器),做浮点计算(floating-point arithmetic), memory management, and graphics accelerators.
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ARM
Advanced RISC Machine.
ISA(Instruction Set Architecture)
- ISA:指令集体系架构。
- ISA 位于软件和硬件之间,硬件的功能通过ISA提供出来,软件通过ISA规定的指令使用硬件。
CSAPP(Computer Systems: A Programmer's Perspective)
- Author(s): Randal E. Bryant, David R. O'Hallaron
- Publisher: Pearson, Year: 2015
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值得好好读
了解一下内存模型 - Computerhope 是个不错的网站;
- TOP 500 wikipedia;
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TOP 500 org;
Share of processor architecture families in TOP500 supercomputers by time trend
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