第一步 建立功能模块

module  key_ctrl_led(
    input   wire    key1,
    input   wire    key2,
    input   wire    key3,
    output  wire    led
    );
assign led = key1&key2&key3;
endmodule

第二部 建立仿真激励模块

`timescale  1ns/1ns
module  tb_key_ctrl_led();
reg key11,key22,key33;
wire    led1;
always #10  key11={$random};
always #15  key22={$random};
always #20  key33={$random};
key_ctrl_led key_ctrl_led_inst(
    .key1(key11),
    .key2(key22),
    .key3(key33),
    .led(led1)
    );
endmodule

第三部 提交仿真

自学FPGA，跟着V3学院的尤老师学习，加油！！！